i.MX 6 - Electrocomponentes

Transcripción

i.MX
Tu Interfaz
al mundo
i.MX ofrece las plataformas más versátiles para aplicaciones multimedia, permiten incorporar
personalidad e interactividad a un nuevo mundo de productos
Confidential and Proprietary
TM
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ,
StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC,
Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale
Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc.
Freescale es Líder Global
Soluciones de Procesamiento Embebido
Connect
Connect
(RF)
Automotríz
Automotríz
Networking
Networking
Industrial
Industrial
(RF)
Sense
Sense
(Sensors)
(Sensors)
Embedded
Embedded
Processing
Processing
(MCU,
(MCU,
MPU,
MPU,
DSP)
DSP)
Consumo
Consumo
Software
>50 años de historia
>6,100 familias de
patentes
>18,000 clientes
>5,500 ingenieros
TM
Plataformas
Control
Control
(Analog)
(Analog)
I+D estratégico – Plataformas
Qorivva
MCUs Automotríces
•
•
La arquitectura automotríz más
poderosa de la industria
Memoria no volátil única
Xtrinsic
Sensores Inteligentes
•
•
1er chip de seguridad de 77GHz
Soluciones Integradas:
Procesamiento + Conectividad +
Manejo de Consumo
Kinetis
MCUs
•
•
TM
Primer MCU ARM Cortex-M4 de la
Industria
La oferta más grande y escalable de
soluciones
core-agnostic
Confidential
and Proprietary
QorIQ Qonverge
Radio bases
•
•
•
1er “radio base en un chip”
QorIQ y Starcore DSP integrados
Reduce costos y consumo
i.MX
Procesadores Multimedia
•
•
•
Líder del mercado para eReader (IDC)
No. 2 Auto Infotainment (Strategy Analytics)
No. 3 Mobile Apps Processors (Linley 5/2011)
Oferta Integral de Soluciones con Tecnología ARM
Kinetis
MCUs
Controladores
Vybrid
Procesadores de
Aplicaciones i.MX
Design Potential. Realized
Rich Apps in Real Time.
Your Interface to the World.
Procesadores
QorIQ-Arquitectura
Layerscape
Las soluciones más
escalables de la industria,
bajo consumo, periféricos
analógicos, etc. Basados en
el core ARM®
Soluciones para
aplicaciones Real-time, muy
integrados con gráficos 2D
para HMI y con muchas
opciones de conectividad.
La soIución multimedia más
versátil de la industria, con
escalabilidad multicore, bajo
consumo y gran integración.
Primer sistema para
networking; software-aware
y core-agnostic para las
redes del futuro.
Accelerating the Network’s IQ
Cortex™ M4 y Cortex™ M0+
Consumer
Consumer
Consumer
Networking
Industrial
Automotive
Automotive
Industrial
Industrial
Industrial
Freescale la primera oferta integral del mercado de soluciones basadas en ARM ® para aplicaciones
automotríces, industriales, consumo y networking.
TM
Tendencia: necesidades de procesamiento en mayor
cantidad de dispositivos
Note: PC installed base reached 100mm in 1993, cellphone / Internet users reached 1B in 2002 / 2005 respectively;
Source: ITU, Mark Lipacis, Morgan Stanley Research
TM
El modelo de uso de las Tablets está evolucionando
Hoy
Introducción del
segmento
Corto Plazo
Consumo propósito general
Impresoras
Multimedia para Hogares
Bueno, Mejor, Superior
eReaders Color
eLearning
Juegos
Industriales
Factor de Forma
Para negocios
Medicina
Pequeño, Mediano y
IPTV
Grande
Auto infotainment
Teléfonos IP Hogareños
Teléfonos IP para empresas
Teléfonos Multimedia
Segmentos de Precio
Monitores Inteligentes
Displays para Línea Blanca
.
.
.
Segmentación
Maduración/Proliferación
de la
Tradicional por costo
TM
Largo Plazo
Segmentación
Nuestra vision: Inteligencia en Todos Lados
•
•
i.MX serie 6 provee soluciones
clave para productos de
consumo, y también para el
mercado general emergente que
definirá los nuevos “smart
devices” para el futuro
IDC Intelligent Systems
Visión 2020
1.9
Billion
PCs
2.6
Billion
Mobile Phones
2.0
Billion
Consumer
Electronics
Dos modelos emergentes para
diseños de smart devices:
−
−
Bueno/Mejor/Superior, versiones de
la misma aplicación
25 Billion +
Diferentes aplicaciones para la
misma platforma para llenar una
oferta de productos
TM
Embedded and
Intelligent Systems
Source: IDC 2011
Mobile Intelligent Systems: The Next Big Opportunity, October 2011 - Doc # 230818
Freescale Multimedia Solutions – Impulso del Mercado
•
•
•
•
•
•
ARM: partner de arquitectura
150M de procesadores i.MX entregados
8,000 placas entregadas, duplica año a año
+2,000 clientes activos en 2011
+150,000 visitas a la web de i.MX por cuarto
+300 nuevos miembros por més de la comunidad i.MX
TM
i.MX: Multimedia en Todos Lados
Estamos convirtiendo todo en electrónica de consumo
Car infotainment
IP Phones
Medical
IPTV
Appliances
Education devices
Industrial HMI
Metering
Digital signage
In-flight infotainment
Enterprise tablets
Desde:
TM
DECT phones
a:
Six Generations of Application Processors
1995
2001
2003
2005
2009
2011
Dragonball
i.MX1
i.MX2 Series
i.MX3 Series
i.MX5 Series
i.MX 6 Series
1
1st FSL ARM9
Apps Processor
90nm LP
HW Video Accel
Analog Integration
ARM11
GPU Integration
65nm LP/GP
ARM Cortex-A8
>1GHz
40nm LP
ARM Cortex-A9
Multi-core
st FSL Apps Processor
50+ Products
>150M Units
•
•
•
Líder en procesadores para eReader (IDC)
No. 1 en procesadores para aplicaciones (IDC 12/2011)
No. 2 en Auto Infotainment (Strategy Analytics)
TM
Freescale i.MX
TM
i.MX 6: Una Platforma, Productos Diferenciados
Ahorro de costos de desarrollo y mejora el time to market.
La escalabilidad con múltiples cores es clave para implementar esta estrategia.
Quad
Quad
Core
Core
High-End
(6Quad)
High-End
(6Dual)
Diseño
de
Smart
Device
Dual
Dual
Core
Core
Low-End
(6DualLite)
Single
Single
Core
Core
High-End
(6Solo)
Low-End
(6SoloLite)
IPTV
High Performance Tablet
Auto Infotainment
Smart Monitor
Business Tablet
Media Tablet
IP Phone
Tablets para niños
Mainstream Infotainment
eReaders Color
Smart Energy
eReaders
Entry Auto Infotainment
TM
Programa Product Longevity de Freescale
►
En mercado embebido necesita soporte de productos de
largo plazo
►
Freescale provee soporte para producción de largo
plazo para sus productos desde hace mucho tiempo
►
Freescale tiene un programa formal de soporte de
largo plazo “product longevity” para los mercados que
atiende
►
•
Para aplicaciones automotríces y médicas, Freescale
garantiza mínimo 15 años de soporte para los productos
seleccionados
•
Para los otros mercados, Freescale garantiza mínimo 10
años de soporte para los productos seleccionados
•
El ciclo de vida comienza cuando se lanza el producto
Una lista de productos incluídos en el programa está
disponible en: www.freescale.com/productlongevity
TM
i.MX de Freescale
i.MX28, i.MX233,
i.MX25, i.MX27,
i.MX31, i.MX35
Luxury
Infotainment
Advanced
HMI
Color
eReader
Business
Tablet
Mainstream
Infotainment
Medical
Monochrome
eReader
Single
Function
Tablet
Connected
Radio
Smart
Energy
Meter
NEW
i.MX51, i.MX50
i.MX 6Solo
i.MX 6SoloLite
Media Box
NEW
TM
Bueno, MEjor, El mejor /Diferenciación
i.MX 6Dual
i.MX 6DualLite
High
Performance
Tablet
Creación de Contenidos, Driver de
Tecnología
i.MX53
Performance/ Capacidad Multimedia
i.MX 6Quad
Serie i.MX 6 - Visión General
Escalable: serie de cinco familias basadas en ARM Cortex A9
i.MX 6
i.MX 6
i.MX 6DualLite
i.MX 6Solo
i.MX 6SoloLite
•
•
•
•
•
i.MX 6
1x 1GHz
x32 400MHz DDR3
No HW video accel.
2D graphics (2 GPUs)
LCD, EPD
•
•
•
•
1x 1GHz
x32 400MHz DDR3
HD1080p video
2D+3D (2 GPUs),
53Mtri/s
• LCD, EPD
•
•
•
•
2x 1GHz
x64 400MHz DDR3
HD1080p video
2D+3D (2 GPUs),
53Mtri/s
• LCD, EPD
i.MX 6
i.MX 6Dual
•
•
•
•
TM
i.MX 6Quad
•
2x 1/1.2GHz
x64 533MHz DDR3 •
Dual HD1080p video •
•
2D+3D (3 GPUs),
176 Mtri/s
• LCD
•
Compatible Pin-a-pin
Software Compatible
i.MX 6
4x 1/1.2GHz
x64 533MHz DDR3
Dual HD1080p video
2D+3D (3 GPUs),
176 Mtri/s
LCD
Freescale i.MX 6: compatibilidad pin a pin
Freescale
Competidores
Compatibilidad de Pines
entre familias
i.MX 6Solo
dentro de una familia
(típicamente escalado
en frequencia)
i.MX 6DualLite
dentro de una familia
(escalado en frecuencia,
menores prestaciones,
diferentes calificaciones)
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
TM
i.MX 6Quad
TM
TM
TM
TM
TM
TM
El Time to Market está condicionado por el Software
Software Soportado por
i.MX:
Google Android™
Windows Embedded CE
Ubuntu
Linux® OS
QNX®
120
100
Costo de Diseño ($M)
la serie i.MX 6, el
software se hace una vez y
queda hecho para todo los
productos
140
► Con
Desglose de los costos promedio de diseño para diferenctes
actividades y nodos tecnológicos
Software
80
60
40
Verification
20
Validation
Physical
0
350
250
180
130
90
65
45
32
Nodo Tecnológico
Linaro
Software
Adobe® Flash®
Verification
Skype™
Validation
TM
Physical
Architecture
Source: IBS 2009
22
Integración Inteligente de Multi-Media
i.MX 6Dual/6Quad VPU
-
i.MX 6Dual/6Quad IPU
Decodificación H.264 MVC1080p60
Codificación H.264 MVC 720p60
350mW para un video!
Recording Video
-
Soporte para 4 Displays (2x MIPI-DSI, Parallel, HDMI v1.4a)
Entrada de cámara estereoscopica
Ajustes de color y gamut mapping
Corrección de Gamma y estiramiento de contraste
Compensación para baja luz & reducción de backlight
Image
Image
capture
capture
3D LCD
VPU
VPU
2x/4x
2x/4x ARM
ARM
CortexCortex- A9s
A9s
IPU
IPU
Publish
Movie Content
2D/3D
2D/3D
Graphics
Graphics
3D Television
Game Content
i.MX 6Dual/6Quad Triple-Play Graphics
- 3 motores: 3D, OpenVG y BLT
- 200 MT/s, 4 shaders, 3 motores separados
- Juegos 3D de alta calidad optimizados para móbiles
- Vistad de realidad aumentada (mundo real + objetos 3D)
- Formatos de video 3D avanzados
(formato
source/depth)
Confidential
and Proprietary
TM
i.MX 6Dual/6Quad– 2x/4x cores
- Crea, transforma, mejora, & publica multimedia rápido!
- Interfaces de Usuario Intuitivas para ver contenidos
- Escalabilidad para el ‘próximo gran caso de uso’
Serie i.MX 6- Lista de prestaciones (1/3)
En rojo se indican los cambios respecto de la columna de la izquierda
i.MX 6SoloLite
i.MX 6Solo
i.MX 6DualLite
i.MX 6Dual
i.MX 6Quad
Core
1x 1GHz
Cortex-A9,
256KB L2 cache,
32K+32K I/D L1
1x 1GHz
Cortex-A9
512KB L2 cache,
32K+32K I/D L1
2x 1GHz
Cortex-A9,
512KB L2 cache,
32K+32K I/D L1
2x 1/1.2 GHz CortexA9,
1MB L2 cache,
32K+32K I/D L1
4x 1/1.2 GHz CortexA9,
1MB L2 cache,
32K+32K I/D L1
DMIPS
2400 DMIPS
2900 DMIPS
4800 DMIPS
5700 DMIPS
11500 DMIPS
Process
Tech
40nm, LP
40nm, LP
40nm, LP
40nm, LP
40nm, LP
DDR
Memory
x32 LP-DDR2, DDR3,
DDR3L, Page
interleaving
x32
LP-DDR2, DDR3,
DDR3L,
Page interleaving
2x32 LP-DDR2,
1chx64 DDR3 /
DDR3L,
Page and channel
interleaving
2x32 LP-DDR2,
1chx64 DDR3 /
DDR3L,
Page and channel
interleaving
2x32 LP-DDR2,
1chx64 DDR3 /
DDR3L,
Page and channel
interleaving
Max DDR
Speed
400MHz (800MT/s)
400MHz (800MT/s)
400MHz (800MT/s)
533MHz, (1066MT/s)
533MHz, (1066MT/s)
NAND
-
SLC/MLC, 40-bit
ECC, ONFI2.2, DDR
SLC/MLC, 40-bit
ECC, ONFI2.2, DDR
SLC/MLC, 40-bit
ECC, ONFI2.2, DDR
SLC/MLC, 40-bit ECC,
ONFI2.2, DDR
Video
Codecs
SW Only
Decode: MPEG-2,
H.264 MVC, VC1,
MPEG-4/Xvid, DivX 6,
H.263, MJPEG, VP6 /
WebM VP8
Encode: H.264,
H.263, MPEG-4,
MPEG-2, MJPEG
Decode: MPEG-2,
H.264 MVC, VC1,
H.263, MJPEG, VP6 /
WebM VP8
Encode: H.264,
H.263, MPEG-4,
MPEG-2, MJPEG
Decode: MPEG-2,
H.264 MVC, VC1,
H.263, MJPEG, VP6 /
WebM VP8
Encode: H.264,
H.263, MPEG-4,
MPEG-2, MJPEG
Decode: MPEG-2,
H.264 MVC, VC1,
H.263, MJPEG, VP6 /
WebM VP8
Encode: H.264, H.263,
MPEG-4, MPEG-2,
MJPEG
Video
Decode
SW Only
1080p30 + D1
1080p30 + D1
1080p60or30 + D1
Dual 1080p decode
1080p60or30 + D1
Dual 1080p decode
Video
Encode
1080p30 H.264BP
1080p30 H.264BP
the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ,
SWFreescale,
Only
StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack,
ColdFire+, 720p
CoreNet, Flexis,
Kinetis, MXC,
Dual
encode
Dual
720p
encode
1080p30 H.264BP
Dual 720p encode
1080p30 H.264 BP
Dual 720p encode
TM
i.MX 6SoloLite
i.MX 6Solo
i.MX 6DualLite
Display
(@60Hz)
WXGA
(1366 x 768)
2 x WXGA (1366 x
768)
2 x WXGA (1366 x
768)
Display
Interfaces
Types: EPDC,
Parallel,
Two outputs
Types: 2x Parallel,
2xLVDS, MIPI-DSI,
HDMI, EPDC
Two outputs
Types: 2x Parallel,
2xLVDS, MIPI-DSI,
HDMI, EPDC
Two outputs
Types: 2x parallel,
2x LVDS, MIPI-DSI,
HDMI
Four outputs
Types: 2x parallel, 2x
LVDS, MIPI-DSI,
HDMI
Four outputs
16-bit parallel
Types: 2x20-bit
parallel, MIPI-CSI2
(2 lanes)
Two inputs
Types: 2x20-bit
parallel, MIPI-CSI2
(2 lanes)
Two inputs
Types: 2x 20-bit
parallel, MIPI-CSI2
(4 lanes)
Three inputs
Types: 2x 20-bit
parallel, MIPI-CSI2
(4 lanes)
Three inputs
GPU 3D
(OpenGL ES)
n/a
Vivante GC880
53Mtri/s
266Mpxl/s
OpenGL ES 2.1
Vivante GC880
53Mtri/s
266Mpxl/s
OpenGL ES 2.1
GPU 2D (Vector
Graphics)
Vivante GC355
300Mpxl/s
OpenVG 1.1
via GPU 3D
via GPU 3D
Vivante GC355
300Mpxl/s
OpenVG 1.1
Vivante GC355
300Mpxl/s
OpenVG 1.1
GPU 2D
(Composition)
via GPU 2D
Vivante GC320
600Mpxl/s, BLIT
Vivante GC320
600Mpxl/s, BLIT
Vivante GC320
600Mpxl/s, BLIT
Vivante GC320
600Mpxl/s, BLIT
Hard Drive I/F
n/a
n/a
n/a
S-ATA II 3Gbps
S-ATA II 3Gbps
Audio accel
n/a
ASRC
ASRC
ASRC
ASRC
Audio
Interfaces
3x I2S, SPDIF
Tx/Rx
3x I2S, SPDIF Tx/Rx,
ESAI
ESAI
ESAI
Camera
Interface
TM
ESAI
i.MX 6Dual
i.MX 6Quad
2 x 4XGA (2048x1536)
2 x 4XGA (2048x1536) or
or
2 x [1080p + WXGA
2 x [1080p + WXGA
(1280x720)]
(1280x720)]
Vivante GC2000
176Mtri/s 1000Mpxl/s
OpenGL, GL ES 2.1 &
Halti, OpenCL 1.1 EP
Vivante GC2000
176Mtri/s 1000Mpxl/s
OpenGL, GL ES 2.1 &
Halti, OpenCL 1.1 EP
i.MX 6SoloLite
i.MX 6Solo
i.MX 6DualLite
i.MX 6Dual
i.MX 6Quad
Expansion
Ports
3x SD/MMC 4.4, 1x
SDXC
4x SPI, 5x UART,
3x I2C
3x SD/MMC 4.4,
1x SDXC
4x SPI, 5x UART,
3x I2C,
MIPI-HSI,
PCIe 2.0 (1 lane),
2x FlexCan, MLB-150
3x SD/MMC 4.4,
1x SDXC
4x SPI, 5x UART,
4x I2C,
MIPI-HSI,
PCIe 2.0 (1 lane),
2x FlexCan, MLB-150
3x SD/MMC 4.4,
1x SDXC
5x SPI, 5x UART,
3x I2C,
MIPI-HSI,
PCIe 2.0 (1 lane),
2x FlexCan, MLB-150
3x SD/MMC 4.4,
1x SDXC
5x SPI, 5x UART,
3x I2C,
MIPI-HSI,
PCIe 2.0 (1 lane), 2x
FlexCan, MLB-150
USB I/F
Three USB2.0:
1x HS OTG + PHY,
1x Host + PHY
1x Host USB HSIC
Four USB2.0:
1x HS OTG + PHY,
1x Host + PHY
2x Host USB HSIC
Four USB2.0:
1x HS OTG + PHY,
1x Host + PHY
2x Host USB HSIC
Four USB2.0:
1x HS OTG + PHY,
1x Host + PHY
2x Host USB HSIC
Four USB2.0:
1x HS OTG + PHY,
1x Host + PHY
2x Host USB HSIC
Ethernet
10/100 Mbps
1 Gbps + IEEE1588
1 Gbps + IEEE1588
1 Gbps + IEEE1588
1 Gbps + IEEE1588
Boot
Updated boot
sources
Boot from
encrypted image
Updated boot sources
Boot from encrypted
image
Boot from encrypted
image
Boot from encrypted
image
Boot from encrypted
image
Temperat.
Monitor
Yes
Yes
Yes
Yes
Yes
PMU
PMU integration
PMU integration
PMU integration
PMU integration
PMU integration
Security
High Assurance
Boot, Secure RAM,
Crypto Acc.,
TrustZone, NIST
approved RNG
High Assurance Boot,
Secure RAM, Crypto
Acc., TrustZone, NIST
approved RNG
Secure RAM, Crypto
approved RNG
Secure RAM, Crypto
approved RNG
Secure RAM, Crypto
Acc., TrustZone,
NIST approved RNG
Package
13x13 0.5m BGA
TM
21x21 0.8P BGA pin-compatible
SABRE- Platforma para Tablets basada en i.MX 6
GPS
Bluetooth®®
Flash
Memory
WiFi
Diagrama de Bloques
Dual LPDDR2 or
Dual DDR3
DRAM
up to 2GB
SDIO
SDIO
UART
UART
3G
Modem
UART
UART
Dual MIC
USB
USB ULPI
ULPI
l2C
l2C
l2C
l2C
LVDS
Home Wireless
Compass
Gyro
Accelerometer
Sensors
MCU
MCU
Device Storage
Wireless
and Connectivity
charging/docking
station
TM
Cap
Touch
Sensors
Dual
Displays
ZigBee RF4CE
MIPI
MIPI
CSI
CSI
SP,
SP,
HSI
HSI II
I2S
I2S
SATA
SATA
l2C
l2C
1.2Ghz
Dual 1080p Video
Triple Play Graphics
0.8mm BGA or 0.4mm POP
USB
USB
HDMI
HDMI
PF100
Platform
Power
Management
IC
i.MX 6
Applications
Processor
SDIO
SDIO
(if needed)
Watt Saver
AC adapter
Speakers
Audio
CODEC
SSI
SSI
ESAI
ESAI
3D (Dual) Camera
Multi-Format
Radio
RF
RF
Diagrama Típico de Smart IP Phone
2GB SLC NAND
or MLC,
or Managed
NAND)
.MX 6 Connectivity
details
MMC 4.4 / SD 3.0 x3
Dual 32x LPDual
LP-DDR2
2GB
DDR2
2GB
or 64x DDR3
1-2GB
NFC
DECT
(ex:
(ex: Inside
Inside
Secure
Secure
MicroRead)
MicroRead)
up to 40-bit ECC
(ex:
(ex: Dialog
Dialog
SC14441)
SC14441)
Bluetooth/
Wifi
(ex:
(ex: Atheros)
Atheros)
MMC 4.4 / SDXC
NAND
NAND FC
FC
UART x5, 5Mbps
EMI
EMI
SPI
SPI
UART
UART
SSI
SSI
I2C x3, SPI x5
ESAI, I2S/SSI x3
CMOS
sensor
w/ ISP
CMOS
sensor
w/ ISP
3.3V GPIO
Keypad
S-ATA & PHY 3Gbps
USB2 OTG & PHY
USB2 Host & PHY
USB2 HSIC Host x2
UART
UART
MIPI
MIPI CSI
CSI
Parallel
Parallel
External display
7” display
SDIO
SDIO
i.MX 6
Chan
Chan 3
3
Speaker
Speaker
HDMI
HDMI
Chan
Chan 2
2
Speaker
Speaker
SSI
SSI
ESAI
ESAI
Parallel
Parallel
or LVDS or EPDC
FlexCAN x2
MLB150 + DTCP
1Gb Ethernet
+ IEEE1588
PF100
Platform
PMIC
RGMII
Ethernet
switch
w/ PHY
NAND Ctrl (BCH40)
LP-DDR2,
DDR3 / DDR3L
x32/64, 533 MHz
3.6V
PoE
MC34670
PoE
-48V
USB
2
Ser
Handset
Handset
Speaker
Speaker
I2C
I2C
SD/MMC
SD/MMC
USB
USB Host
Host
USB
USB OTG
OTG
PCIe 2.0 (1-lane)
UART
UART
I2C
I2C
S/PDIF Tx/Rx
Gb
Gb Eth
Eth
MIPI HSI
w/ PHYs
USB
switch
MPR
0121
Touch
keys
PC
ConfidentialLAN
and Proprietary
MIPI CSI2
4-bit RGB, LVDS (x3-8)
20-bit CSI
TM
: Freescale chip
Analog
Analog
Gain
Gain
Handset
Handset
MIC
MIC
Chan
Chan 2
2
MIC
MIC
HDMI & PHY
MIPI DSI
SGTL5000
Audio
CODEC
Chan
Chan 3
3
MIC
MIC
Ejemplo de STB IP usando i.MX 6
SCL/MLC
NAND Flash
64x
or
DualDDR3
LP-DDR2
2GB
Dual
32x
2GB
LPDDR2
NAND
NAND FC
FC
EMI
EMI
Optional
Bluetooth
UART
UART
SDIO
SDIO
Optional
camera
SSI
SSI
MIPI
MIPI CSI
CSI
Integrated
Integrated
PMIC
PMIC
I2C
I2C
Ethernet
Ethernet
PHY
PHY
SATA
SATA
LVDS
LVDS
USB
USB Host
Host
PF100
Platform
PMIC
TV
TV
encoder
encoder
Ethernet
Ethernet
S-video/
Composite/
Component
ESAI
ESAI
SGTL5000
audio
codec
UART
UART
IR
IR
receiver
I2C
I2C
MC13233
RF4CE
Internal
HDD
External
HDD
: Freescale chip
TM
10/100/1Gb
Ethernet
for Dolby
& DTS
optional
optional
i.MX 6
HDMI
HDMI
DSP56721
Audio DSP
Line out
Wifi
Serie i.MX 6 – Fuente de Alimentación
•
i.MX 6 y los PMICs Serie PF  Maximizan flexibilidad en el diseño de la fuente de alimentación
•
i.MX 6 + PMIC PF Flexibilidad para alimentar las últimas plataformas embebidas Smart Devices, Auto infotainment, etc
•
i.MX 6 La PMU integrada tiene un eficiencia cercana al 90% para aplicaciones de alto consumo, sin múltiples inductores
y menos capacitores
•
i.MX 6 Puede alimentar componentes externos
•
Opcionalmente pueden usarce reguladores discretos para alimentar i.MX 6/DDR para hardware bàsico con pocos
periféricos
DCDC
Low
DCDC
High
i.MX 6
Coin cell
(optional)
Freescale
PF Series
PMIC
i.MX 6
DDR
IO
Basado en PMIC PF-Series de Freescale
Discreto
- Implementación Simple
- Bueno para plataformas básica con pocos componentes
más allá de la CPU, la Memoria y el Almacenamiento
- La flexibilitdad de la plataforma es más limiteda vs PMIC
- Optimizado para i.MX 6
- Alternativas flexibles de alimentación para Smart
Device y sistemas de Auto infotainment
- Alimenta el procesador y DDR IO
- Bueno para plataformas más complejas con
WIFI, BT, data modems, FPGAs, LEDs, etc
TM
Freescale EcoMAPS para i.MX
Customer Application
SW
Dev
Tools
Dev
Tools
SW
Dev
Tools
Dev
Tools
Application
Application Specific
Specific
HW & SW Engineering Services
SSI
fast
fast
boot
boot
Middleware
Middleware
EBS
Advantech
Security
Boundary Devices
Congatec
Digi International
iWave
Kontron
NovTech
SECO
TQ
BlueTechnix
Garz and
Fricke
Ka-Ro
Phytec
Operating
Operating Systems
Systems
i.MX
i.MX Processors
Processors
More Standard
IDE: Integrated Development Environment
EBS: Embedded Board Solutions
BDM: Background Debug Module
Training
IDH
ODM
Training
Partners
Compal
Acsys
FIC
Adeneo
Foxconn
iWave
HMS
Letou
Netronix
Archermind
Pengutronix
Thundersoft
More Custom
IDH: Independent Design House
ODM Original Design Manufacturer
SSI: Software & Solution Integrators
www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX6_SW
TM
Herramientas de Hardware
TM
i.MX 6 – Placas de Desarrollo
•
•
•
•
Todas las placas diseñadas por FSL
• Todas
placas
diseñadaspor
porFSL
FSL
Todas
laslas
placas
soportadas
•
Todas
las
placas
soportadas
por
Placas comunes para 6Q/D/DL/S FSL
• Placastiene
comunes
para 6Q/D/DL/S
SoloLite
su propia
EVK
• SoloLite tiene su propia EVK
i.MX 6
i.MX 6Quad
• Dual DDR
i.MX 6
i.MX 6Dual
• Dual DDR
i.MX 6
i.MX 6Dual Lite
• Dual DDR
• EPD

SABRE–AI para Automotríz

SABRE para Smart Devices
i.MX 6
i.MX 6Solo
• Single DDR
• EPD
i.MX 6
i.MX 6SoloLite
• Single DDR
• EPD



SABRE Board para Smart Devices

i.MX 6SLEVK
i.MX
i.MX 66 maximiza
maximiza el
el uso
uso de
de las
las placas
placas de
de referencia
referencia para
para todas
todas sus
sus versiones
versiones
TM
i.MX 6 – Placas de Desarrollo
Development Tool
Part Number
SABRE placa Smart Devices
MCIMX6Q-SDB
MCIMX6Q-SDP
MCIMX6DL-SDP
SABRE placa Auto Infotainment – CPU card
MCIMX6QAICPU1*
SABRE placa Auto Infotainment – CPU card
MCIMX6DLAICPU1*
SABRE placa Auto Infotainment – base board
i.MX 6SoloLite EVK
MCIMXABASEV1*
MCIMX6LEVK
*Solo para OEM’s automotrices
•
SABRE-SDB y SABRE-SDP
− Módulos
•
Wi-Fi a travéz de Silex: http://www.silexamerica.com/freescale/
Para más información sobre los kits:
− www.freescale.com/sabresdp
− www.freescale.com/sabresdb
− www.freescale.com/sabreai
− www.freescale.com/6slevk
TM
i.MX 6 – Módulos con pines
Company
Product
URL
Comments
Advantech
ROM-1220
UBC-DS31
advantech.com
FTF Sponsor & Demo’s now
Production launch ready
Congatec
conga-QMX6:
Qseven quad-core
ARM module
http://www.congatec.com/qm
x6.html?&L=0
FTF Sponsor & Demo’s now.
Kontron
Smarc-sAMX6i
FTF Sponsor
Production target 4Q
SECO
QUADMO747X/i.MX 6
UDOO
http://us.kontron.com/product
s/computeronmodules/smarc/sma
rcsamx6i.html
http://www.seco.com/en/item/
quadmo747-x_i_mx6/
Boundary
Devices
SABRE-Lite &
Nitrogen 6X
http://boundarydevices.com/i
mx6-nitrogen
Pejman Kalkhoran
[email protected]
]
NovTech
NOVPEK i.MX6Q/D
System
http://www.novtech.com/novp
ek/novpek-imx-6
iWave
Rainbow-G15M-Q7
i.MX6 Q7 Module
http://www.iwavesystems.co
m/?q=node/239
Intrinsyc
OPEN-6 Platform
[email protected]
http://www.intrinsyc.com/serv
ices/
Michael George:
Confidential and Proprietary [email protected]
TM
i.MX 6 – Módulos con pines
Company
Product
URL
Comments
TQ
TQMa6x
DwF golden sposnsor
Phytec
phyFLEX®-i.MX6
http://
http://www.tq-group.com/en/pro
ducts/industry-pcs/prod/embedd
ed-modul-tqma6x/extb/Main/prod
uctdetail/
HeiFi
[email protected]
http://phytec.com/products/syst
em-on-modules/phyflex/i.mx6/
Josie Strobel
[email protected]
Digi International
ConnectCore i.MX6
www.digi.com
FTF Sponsor
Ka-Ro
TX6Q
http://www.karo-electronics.com
/tx6
BlueTechnix
CM-i.MX6x
http://ww2.bluetechnix.com/en/
bluetechnix/home/
TM
i.MX 6 – Integradores de Software
Company
Operating
System(s)
URL
Supporting
Hardware
Comments
Adeneo
WinCE7
Linux (2.6.38+)
Android (ICS+)
Hyperlink to BSP
SABRE-Lite
* Most EBS
Demo’s now
Training ready
Allgo
Linux (2.6.38+)
Android (ICS+
Hyperlink to Allgo
SABRE-Lite
FTF Sponsor
Target demo at FTF
QNX
QNXcar
Hyperlink to QNX
SABRE-Lite
Nitrogen 6x
NOVPEK
Training ready
iWave
Android (ICS)
Linux (2.6.38+)
WinCE7
Hyperlink to iWave
SABRE-Lite
iWave EBS
Wind River
Genivi Linux
VxWorks
Hyperlink to WindRiver
SABRE-Lite
Nitrogen 6x
FTF Sponsor
Target Production Launch ready
Mentor
Genivi Linux
Nucleus
Hyperlink to Mentor Gra
phics
SABRE-Lite
FTF Sponsor & Demo
TimeSys
Linux Link
Hyperlink to TimeSys
Nitrogen 6X
FTF Sponsor & Demo
Intrinsyc
Android (ICS)
Hyperlink to Intrinsyc
Intrinsyc EBS
GreenHills
Integrity
Hyperlink to GreenHills
SABRE-Lite
TM
i.MX 6SoloLite y PMIC PFUZE
•
1GHz ARM® Cortex™ -A9 processing
PF0100
+
i.MX 6SL
core with
PMIC
•
NEON™ coprocessor, 2D graphics and flexible memory
options
•
From the family that introduced the market-leading i.MX508
processor eReaders, the i.MX 6SL family offers support for
•
Electronic Paper Display (EPD) in addition to LCD
•
Targeting a broad range of applications including many low
power, portable consumer devices
•
Integration of Freescale’s PMIC
chip set with i.MX processor for
optimization of power efficiency and
software/hardware integration
PMIC integrates charging, LED
backlight drivers, mini/micro USB
switch, ADC and
=power rails, which
when fully utilized, reduces PCB
footprint and software development
cycles
i.MX 6SL
Kits
=
Two development platforms:
•
Single-board evaluation kit (EVK)
•
Eink Electrophoretic Panel Daughter
Card
•
Linux® and Android™ Board Support Packages are
available through Freescale
One-stop customer service and
support during development phase
to enable the design process
A Single Solution for Streamlined Performance
TM
i.MX 6SL – Plataforma de desarrollo
Processor
• Freescale i.MX 6SL 1 GHz ARM®
Cortex™-A9 CPU
• Freescale PF0100 PMIC
Memory
• 512 MB Double Data Rate2 Mobile
(LPDDR2) DRAM memory
• Footprint for Managed NAND (eMMC/eSD)
• SPI Flash
• Three Secure Digital (SD)/multimedia
card (MMC) sockets
Display
• HDMI Daughter Card available
• Parallel WVGA LCD add-on card via
expansion connector
• EPD add-on card via expansion connector
Connectivity
• USB Host connectors
• Micro USB OTG connector
• Ethernet (10/100T) connector
• SIM Card Socket
• Mini PCIe connector
Debug
• JTAG connector
• One console UART
Other
• MMA8450QT three-axis digital
accelerometer (SABRE)
Tools & OS Support
• VMware player to bring up image
on a Windows PC
• Linux® and Android™ BSPs from
Freescale
Audio
• Audio HP Jack
• External speaker connection
• Microphone
•
LTIB
TM
i.MX 6SL EVK Display options
•
48
EVK
i.MXSL
i.MXSL EVK
EVK
HDMI
EPD
LCD
MCIMXHDMICAR
IMXEBOOKDC3
IMXEBOOKDC3
MCIMX51LCD
MCIMX51LCD
TM
CPU
TM
Core – i.MX 6
i.MX 6Dual / 6Quad
i.MX 6DualLite / 6Solo
i.MX 6SoloLite
2x / 4x Cortex-A9
2x /1x Cortex-A9
1x Cortex-A9
32KB I-cache
per core
32KB D-cache
per core
NEON/FPU
per core
32KB I-cache
per core
PTM
per core
1MB L2-cache
NEON/FPU
per core
32KB D-cache
per core
PTM
per core
512KB L2-cache
TM
32KB I-cache
32KB D-cache
NEON/FPU
256KB L2-cache
PTM
Co-procesador ARM NEON (1/2)
► Arquitectura
SIMD de 128-bit
(Single Instruction, Multiple
Data) externsión de
ARM Cortex™-A
► 32 registros, de 64-bits (pueden
verse como 16 registros, de
128-bits)
•
Las instrucciones NEON hacen procesamiento "Packed SIMD“:
► Los
registros se consideran como vectores de elementos del mismo
tipo de datos
► Los
tipos de datos pueden ser: signed/unsigned 8-bit, 16-bit, 32-bit,
64-bit, single precision floating point
► Las
instrucciones hacen la misma operación en todas la vías
TM
Co-procesador ARM NEON (2/2)
•
NEON provee capacidades estandar para aceleración de multimedia y
procesamiento de señales.
•
NEON se puede usar con poco esfuerzo debido a que los compiladores lo
consideran a la hora de generar instrucciones y generan código
optimizado para NEON
•
Los compiladores NEON aware soportan instrucciones intrísecas de
NEONpermitiendo un nivel de optimisación para NEON sin escribir rutinas
de assembler para NEON
•
El control más fino de NEON está disponible usando assembler. Para
obtener buenos resultados optimizando depende del conocimiento
especializado del desarrollador para usar NEON.
TM
Subsistema Video/Gráficos en i.MX 6
Data
Control
i.MX 6Dual/6Quad
GPUs
Video Sources
Bridges
DCICs
Displays
IPUs
Memory Interface
ARM
CPU
VDOA
VPU
IRAM
TM
External
Memories
Procesador Gráfico (GPU)
TM
i.MX 6: Soluciones gráficas para Triple-Play
i.MX 6
GC200
0
GC355
3D + GPGPU
Vector Graphics
•
•
•
GPU-VG @ 500MHz
350M pixels / sec raw performance
Native OpenVG™ 1.1 Khronos
conformance with hardware
tessellation
GC320
Composition
GPUv4 @ 533MHz
•
−
200M triangles / sec
•
−
4 Shader Cores: 30 GFLOPS
−
Halti support
−
DirectX®
TM
GPU-2Dv1 @500Mhz
Up to 1G pixels / sec raw
performance
i.MX 6 Series Triple-Play Graphics support
i.MX 6SoloLite
i.MX 6Solo / 6DualLite
i.MX 6Quad / 6Dual
GC320
GC320
GC320
Composición
Composición
Composición
(2D BLIT)
(2D BLIT)
(2D BLIT)
GC355
GC355
Vector Graphics
Vector Graphics
GC200
0
GC880
3D GPU
3D + GP GPU
1 shader core
4 shader cores
Same GPU drivers for all i.MX 6 Processors
TM
Procesador de Video (VPU)
TM
Cadena de procesamiento multimedia
►
Image Signal Processing (Camera)
•
•
•
•
Camera
Camera Preview
Image
Conversions
Video
Processing
Unit (VPU)
Compression
Image Conversions (IPU)
•
•
•
•
Display
Enhancement
Image
Processing
Unit (IPU)
Image Signal
Processing
►
Display
Image Sensor
►
Up to 2 camera sensors
Bayer -> YUV conversion
Image quality enhancement
Camera corrections
Resizing (resolution adjustment)
Rotation & Inversion
Color Space Conversion
Pixel Format Conversion (packing…)
Display Enhancement (IPU)
Two Displays: 2x Parallel, 1x LVDS,
MIPI-DSI, or HDMI
• Color adjustments and gamut mapping
• Gamma correction and contrast
stretching
• Compensation for low-light conditions
and backlight reduction
•
Video/Graphics
Combining
Image
Conversions
De-blocking
De-ringing
De-compression
Graphics
Generation
Graphics
Processing
Units (GPUs)
and ARM
►
Video Processing (VPU)
•
•
►
Multi-codec 1080p enc/dec
Post-processing, error concealment,
etc
Graphics Processing (GPU)
•
•
•
OpenGL ES 2.0, OpenVG 1.1
GC880 – 30-40 MTPS, 1 shaders
GC320 – 600M p/sec 2D
Memory
Combining
with Audio
Communication
Network
Separation
from Audio
HW Accelerated
•
ARM
Audio Compression
Audio De-compression
Video/graphics fully handled
by IPU, VPU and GPU.
−
The CPU doesn/t touch pixels!
TM
Procesador de Imágenes (IPU) y soporte de
Display
TM
i.MX51, i.MX53, i.MX 6Q/D/S – Soporte de Displays
Feature
Throughput
i.MX51 (IPUv3EX)
# of outputs
Pixel clock rate
Resolution
(@ 60 Hz)
Interfaces
Parallel
i.MX53
i.MX 6Solo
i.MX 6Dual/6Quad
(IPUv3M)
(IPUv3H)
(2 x IPUv3H)
2
4
Up to 266 MHz
Up to 266 MHz per IPU
2
Up to 133 MHz
Up to 200 MHz
WXGA+ (1600x900)
720p (1280x720) + SVGA
(800x600)
WUXGA (1920x1200)
1080p (1920x1080) +
WVGA (800x480)
Two ports
24 bits + 18 bits
Two ports
24 bits + 24 bits
2x
WXGA (1366 x 768)
2 x 4XGA (2048x1536)
2 x [1080p + WXGA (1280x720)]
Two ports
24 bits + 24 bits
Two ports
24 bits + 24 bits
Synchronous (for display refresh) and asynchronous (to memory)
Very flexible - glue-less connection to RAM-less displays, display controllers, and TV encoders.
LVDS
No
Two channels; consumer version (multiple pairs); 2x 85 MHz or 170MHz
HDMI
No
One port
MIPI/DSI
No
One port, 2 lanes x 1 Gbps
(non-Automotive)
Analog
One port; TV-out
i.MX37: SDTV
i.MX51: also 720p60 or
1080i/p30
Display Content Authentication
(CRC)
Processing
On-the-fly
combining
(for high resolution
displays)
Off-line combining
Display
enhancement
Also VGA
Rate increased to
1080p60
None (phased out)
No
Yes, for 2 displays
2 planes
(up to 3 more planes for lower resolutions)
Up to 20 MP/sec
Up to 200+
MP/sec
2 planes
(up to 3 more planes for lower
resolutions)
For 2 displays, 2 planes for each
(6 more planes for lower resolutions)
Up to 240+ MP/sex
Up to 500+ MP/sec
Color adjustment and smart gamut mapping; gamma correction and contrast enhancement
Supporting effective proprietary algorithms
Backlight power
Yes; Supporting efficient proprietary algorithms
optimizationFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ,
TM
El Procesador de imágenes
Optional Integrated I/F Bridges
IPU
Video
Sources
Displays
•
MCU
GPU
Camera
Interface
Processing
Including
Image
Enhancements
And
Conversions
Memory
Interface
Display
Interface
Funciones: soporte integral del flujo de datos desde el
sensor de imágen y/o hasta el mdisplay.
−
Conectividad a los dispositivos
−
Relacionado al procesamineto y manipulación de imágenes
−
Capacidad de sincronización y control
TM
Sync &
Control
Memory
IPUv3 (in i.MX37,51,53,6Q, 6D, 6DL, 6S)
•
De-entrelazado
Un filtro de movimiento adaptativo; usa tres entradas
− Para slow motion – conserva la resolución full (en top y bottom), usando interpolación temporal
− Para fast motion – evita el movimiento de cosas, usando interpolación vertical
•
Re dimensionado
−
−
•
Video/Graphics Overlays
−
•
See separate slides
Display Enhancement
−
−
−
•
Bilinear interpolation, with flexible resizing ratio
For radical downsizing: first x2 or x4 downsizing by averaging
Color adjustment – general linear transformation; followed by a hue-preserving gamut mapping
Gamma adjustment – configurable piecewise linear transformation.
May be used to compensate for low-light conditions and to allow backlight reduction
Other
−
−
−
Rotation: 90, 180, 270 degrees
Inversion: horizontal and vertical
Color Space Conversion
TM
DDR Controller
TM
Controlador DDR Multi-Mode
Parameter
i.MX 6Dual/6Quad
i.MX 6DL/6Solo
LPDDR2 support
Yes
Yes
DDR2 support
No
No
DDR3/LVDDR3
support
Yes
Yes
1x32/64 DDR3;
2x32 (Dual channel)
LPDDR2
1x16/32 DDR3;
1x16/32 (Single
Channel) LPDDR2
~4GB
~4GB
Bus width
Max memory size
Address
16 + 3 (DDR3)
CA DDR bus (LPDDR2)
# of CS
2
2
533MHz (1066Mb/s)
400MHz (800Mb/s)
ODT
Yes
Yes
Calibration
Yes
Yes
Max.frequency
MMDC: 64-bit, 2GB LV-DDR3 / DDR3
2Gb,
x16
2Gb,
x16
DQ [63:48]
2Gb,
x16
2Gb,
x16
2Gb,
2Gb,
x16
x16
DQ [47:32]
DQ [31:16]
DQ [15:0]
MMDC: 2xCh 32-bit, 1GB LPDDR2
►Support of Dynamic Frequency Scaling
2Gb,
2Gb,
x32
x32
►Support Real-Time priority via QoS, e.g. for screen refresh
►Access Latency hiding
►Bank interleaving, Channel interleaving
►Consecutive read/write access optimizations
►Enabling access priority to open memory pages
►Deep queues for read and write requests
CS0# - ChA
CS1# - ChA
CA [9:0], ChA
DQ [31:0] - ChA
►Self Refresh and Power Down support
TM
2Gb,
x16
2Gb,
x16
2Gb,
2Gb,
x32
x32
CS0# - ChB
CS1# - ChB
CA [9:0], ChB
DQ [31:0] - ChB
CS0#
CS1#
A [15:0], BA [2:0]
DQ [31:0]
i.MX 6 interfaces
TM
Interfaces de Memoria y Mass Storage
i.MX 6
6Q/6D/6DL/6S
NAND
SLC/MLC
WEIM
SRAM, NOR, OneNAND
OTG
PHY
Host1
PHY
Host2
HS
IC-USB
Host2
HS
IC-USB
SATA
Host
SATA
PHY
10/100/1000
Ethernet
IEEE1588
AVB
PCIe
Root/Endpoint
To OTG
connector
HUB
(USB2524)
to Cellular, WLAN/WiFI/BT
or/and HUB
To external Memory Card
To HDD/SSD <6Q/6D ONLY>
PHY
PCIe
PHY
NAND
• 8 bit bus
• Up to 40 bit ECC support – was 16bit in
i.MX53
• 1.65 … 3.6V supply range
• Boot able
WEIM (SRAM, NOR, OneNAND)
• 16/32 bit A/D multiplexed mode
• 16 bit A/D demuxed
• Address up to 27 bit
• Up to 6 EIM CS (were 4 in iMX53)
• 1.65 … 3.6V IO supply range
• Bootable
SATA (only on 6Q/6D)
• SATA 2.5 specification compliant and AHCI 1.1
compliant Serial ATA Bus Adapter and internal
1 x PHY, up to 3Gbps operations
• Bootable
x1 PCIe –
System extension port
TM
Soporte SD / MMC
SoC
MMC
SD
SDXC (1)
Ver/MHz/Vcc/Boot
Ver/MHz/Vcc/Boot
Ver/MHz/Vcc/Boot
i.MX51
 v4.2 (v4.3 partially)
 26/52 MHz  1.8V, 3.3V
 Bootable
 SD Phy Layer spec 2.0
 SDHC spec 2.0
 12/25/50 MHz  1.8V, 3.3V
 Bootable
 SDXC
 12/25/50 MHz  1.8V, 3.3V
 Non-bootable
i.MX53
 v4.4
 26/52 MHz, DDR  1.8V, 3.3V
 Bootable
 SD spec 2.1
 12/25/50 MHz  1.8V, 3.3V
 Bootable
 SDXC
 12/25/50 MHz, DDR  1.8V, 3.3V
 Non-bootable
i.MX 6
series
 v4.4
 26/52 MHz, DDR
 1.8V, 3.3V
 Bootable
 SD spec 3.0  12/25/50 MHz  1.8V, 3.3V
 Bootable
 SDXC
 12/25/50/100 MHz, DDR  1.8V, 3.3V
 Bootable
(1) SDXC Software support - TBD
TM
Sistema de Audio
►
S/PDIF
•
►
SSI and AudioMUX – same as in i.MX53
•
•
•
►
Three SSI ports, FIFO size increased x2 from i.MX35
3 x 4 AudioMUX
Support I2S specification, Sony format, TDM and AC97. Supports 16x24wide FIFO.
ESAI
•
►
transmitter and receiver
Enabling multi-channel digital audio transmission and receiving (7.1)
ASRC
•
Enables on-the-fly sample rate conversion between various audio streams
TM
Periféricos de Propósito General
►
►
►
►
►
eCSPI/CSPI – one CSPI and two eCSPI ports, same as in
i.MX53
Keypad – almost same as in i.MX53. 8x8 matrix
supported. (6 x 6 – “maim” configuration, but all pads are
shared with other interfaces). External keypad controller
considered for Netbook applications
One-wire – same as in i.MX53 One wire EEPROM and
battery connection. Dallas DS2205 compatible.
UART:
• High speed (up to 4MHz) – covers TIA/EIA-232-F
Standard
• 3 ports, one of them can operate as 8 pins full UART,
DCE and DTE modes. Other are four-wire
• IrDA 1.0
• SIR protocol support (115.2kbps or lower)
• 32 bytes FIFOs for transmitter and receiver,
autobaud.
• 9 bit mode supported
• RS-485 mode supported
GPT - same as in i.MX53
• Two general purpose timers, each of them is a 32-bit
“free-running” or “set and forget” mode timer.
o
o
o
External/Internal clock selectable
External/Internal event interval capturing
Programmable output logic, external output
signal, ARM interrupt.
►
►
►
►
►
►
►
►
PWM - same as in i.MX53
•
Two pulse-width modulators (PWM): 16-bit
resolution and a 4x16 data FIFO
SDMA - same as in i.MX53. Two external SDMA events
Interrupts - same as in i.MX53.
I2C –
•
Three I2C ports compatible with I2C specifications
v2.1 (all up to 400Kb/s)
GPIO:
•
All multifunctional digital pads have the GPIO
functionality – Total number of GPIOs 224
•
The GPIO supports up to 32 interrupts:

programmable active interrupt edges/level
of external signal
All of multifunctional (muxed) IOPADs are GPIO capable
and could be programmed independently
Most of GPIO capable pads are of UHVIO type - 1.65 …
3.6 V operational range with automated voltage range
selection
Default state for most of GPIO capable pads:
•
GPIO
•
Input
•
Weak PU or PD
That was done to avoid on-board contentions in
default state after reset.
TM
MIPI HSI
The HSI is an interface primarily intended to connect an application processor to a cellular modem controller
in
cellular handsets.
HSI provides a multi-processor/multi-context low-latency communication channels over an IC-to-IC link by
dividing the physical link to logical channels at the hardware level.
The features of the HSI module:
• AHB slave interface support for PIO and configure.
• Supports PIO and DMA access mode
• Supports AHB Master interface to SOC interconnect
• Compatible with the HSI specification version1.0 and
HSI Physical Layer v1.01.00 specification
• Full-Duplex High Speed Serial interface
• Supports 16 logical channels for both transmit and
receive operations
• Each channel is configurable and can be enabled and
disabled
• Bandwidth for each channel is programmable
• Supports both stream mode and frame mode for data
transmission and reception
• Maximum bandwidth up to 200Mbs in both transmit and
receive directions
• Configurable transmit and receive FIFO
• Programmable transmission bit rate
• Support both round-robin and priority-based
arbitration for transmission mode
• Run-time configurability of channel ID bit
• Data time out feature supported for receive operation
TM
HDMI
► Description: High-Definition Multimedia Interface (HDMI) Transmitter
including both HDMI TX Controller and PHY
► Standard Compliance: HDMI 1.4a, DVI 1.0, HDCP 1.4 (with keys
stored in embedded eFuses)
 Supporting majority of primary 3D Video formats
► TMDS Core Frequency: From 25 MHz to 340 MHz
► Consumer Electronic Control: Supported
► Monitor Detection: Hot plug/unplug detection and link status
monitor support
► Testing Capabilities: Integrated test module
► Maximal Power Consumption: 70mW
► Temperature Range: -40C to +125C (Tj)
TM
MIPI CSI-2
The CSI-2 MIPI Interface is a digital core accompanied with multi-lane D-PHY that implements all protocol
functions defined in the MIPI CSI-2 Specification, providing an interface between the System and MIPI CSI-2
compliant Camera Sensor
The features of the MIPI CSI-2 complex:
Supported standard version: MIPI CSI-2 Version 1.0
Configuration: one clock lane, four data lanes
Speed: Up to 1Gb/s per lane
•
•
•
TM
Timing accurate signaling of Frame and Line
synchronization packets;
Support for several frame formats such as:
• General Frame or Digital Interlaced Video with or
without accurate sync timing
• Data type (Packet or Frame level) and Virtual
Channel interleaving
32-bit Image Data Interface delivering data formatted
as recommended in CSI-2 Specification;
• Directly supports all primary data formats
conversion to IPU input. Some secondary formats
are treated as “generic” data
• RGB, YUV and RAW color space definitions;
• From 24-bit down to 6-bit per pixel;
• Generic or user-defined byte-based data types
Camera Sensor Interface - CSI
•
Role: controls the camera port
−
•
•
•
Data bus – up to 20 bits
−
Single value – up to 16 bits
−
Two values – up to 10 bits each; e.g. HDTV YUV 4:2:2 input
Variety of data formats
−
Main (with on-the-fly processing): YUV 4:2:2/4:4:4, RGB 16/24 bpp
−
Other: as generic data, including compressed streams
Frame resolution:
−
•
Essentially unlimited (up to 8192 x 4096 pixels), 33Mp
Input rate:
−
•
Provides direct connectivity to relevant image sensors and connectivity bridges: camera, HDMI receiver, TV decoder…
150M MPxl/s peak (@ 200MHz internal clock)
Additional features:
−
Frame rate reduction – by skipping (reduction ratio: m:n, m<=n<=12)
−
Window-of-interest selection – by cropping
TM
Enhanced Serial Audio Interface (ESAI)
Features
• Independent (asynchronous mode) or shared
(synchronous mode) transmit and receive sections with
separate or shared internal/external clocks and frame
syncs, operating in Master or Slave mode.
• Two ports can operate as transmitter only, four others
could be either transmitter or receiver.
• Programmable data interface modes such like I2S, LSB
aligned, MSB aligned
• TDM support from 2 to 32 channels per data line
• Programmable word length (8, 12, 16, 20 or 24bits)
• Flexible selection between system clock or external
oscillator as input clock source, programmable internal
clock divider and frame sync generation
• AC97 support
• Time Slot Mask Registers for reduced CPU overhead (for
Transmit and Receive both)
• 128-word Transmit FIFO shared by six transmitters
• 128-word Receive FIFO shared by four receivers
• Wide selection of data alignment combinations when
moving the 24-bit ESAI data to/from the 32-bit shared
peripheral bus.
TM
Asynchronous Sample Rate Converter
Features
• Designed for rate conversion between 32kHz,
44.1kHz, 48kHz and 96kHz.
• Other sampling rates in the range of 30kHz to
200kHz are also supported, but with reduced
audio performance.
• Automatic accommodation to slow variations in
the incoming and outgoing sampling rates.
• Linear phase.
• Tolerant to sample clock jitter.
• 24-bit  32-bit re-alignment.
SSI1_RX_CLK
SSI1_TX_CLK
SSI1
SSI2_RX_CLK
SSI2_TX_CLK
SSI2
SSI3_RX_CLK
SSI3
SSI3_TX_CLK
MLB_CLK
MLB
SPDIF_RX_CLK
SPDIF
SPDIF_TX_CLK
Clock Selection Logic
ASRC converts the sampling rate of a signal
associated to an input clock into a signal
associated to a different output clock.
- The ASRC supports concurrent sample rate
conversion of up to 10 channels of about -120dB
THD+N.
- The sample rate conversion of each channel is
associated to a pair of incoming and outgoing
sampling rates. The ASRC supports up to 3
sampling rate pairs.
Pair 1
IP bus
Pair 2
DMA RQs
ASRC
Pair 3
Int RQs
ESAI_RX_CLK
ESAI
ESAI_TX_CLK
External (Virtual) _CLK
Note: “Clock selection logic” that is shown here is not actual design
module and just describes the logical model of clock selection
TM
Modos y Fuentes de Boot
•
Flash Devices
−
−
−
•
Serial ATA (using SATA)
−
•
NOR flash (using WEIM)
OneNand (using WEIM)
NAND flash (using NFC)
•
Boot modes are set via eFuses
•
For development purposes, there is
an option to set boot modes via
external pins
Only for 6Quad / 6Dual
Expansion Devices
−
SD/eSD/SDXC/MMC/eMMC (using USDHC1 /
USDHC2 / USDHC3 / USDHC4)
−
−
•
Serial Downloader
−
•
I2C (using I2C1 / I2C2 / I2C3)
SPI (using eCSPI1 / eCSPI2 / eCSPI3/eCSPI4/eCSPI5)
USB (using USB OTG)
Plug-in mode
−
For custom / user-defined boot
TM
Alimentación
TM
i.MX 6Quad/6Dual: PMU Integratda
•
Just two external power
rails
•
•
Optional SRTC coin-cell rail
Optional USB PHY rail
• Internal DVS and Power-Up
Sequence and Reset. No need in
‘smart’ PMIC.
• All external supply rails could be
shared with system components
• Two stage power conversion:
external DCDC pre-regulation,
integrated LDOs (incl. DVS)
• Total system level power delivery
efficiency (including linear
regulators) is similar to typical
DCDC based PMU
• 90% or better in high power mode
with internally bypassed FET
• Better than 65% in low power
modes
• Lowest BoM – no multiple inductors, few external capacitors,
• System level: low cost PMIC or few discrete DCDC
• Maximal flexibility in power management system design
TM
i.MX 6SoloLite – Sistema de Alimentación
System Diagram
Max Supply Requirements
*Preliminary requirements, subject to change
TM
Ventajas del PMIC PF100 para i.MX
•
PF100 PMIC’s are design along side i.MX SOC as a platform solution
−
−
•
Complete reference design with software

Enables faster time to market with fewer resources

Multiple reference designs for various applications supporting multiple OS
Single supplier support

Single point source for support activities

Delivery/ supply alignment

Approved vendor
Enhanced features and performance
−
Programmable output voltages to meet various product needs
−
Fully programmable startup timing and sequence
−
Configurable switchers offer superior flexibility

4 to 7 switches on PF100 depending on application
−
OTP memory to store key parameters
−
Advanced switching charger with autonomous operation and programmable charging characteristics
−
Reduced pin count and external components for smaller footprint
−
High power QFN option for embedded power applications
−
Small form factor MAP-BGA with 0.5mm pitch, while retaining compatibility with 4-layer SDR PCB
TM
Familia PFUZE para i.MX 6
•
The PFUZE family consists of multiple devices targeting different applications:
•
PFUZE 100:
•
•
•
−
i.MX and System power management
−
Supports single, dual, quad core
PFUZE 101:
−
−
Battery, interface and LED functions for
single cell handheld products
−
Supports single, dual and quad core
PFUZE 102:
−
−
Battery and power path for multi-cell
applications
−
Supports single, dual and quad core
PFUZE 201:
−
−
Battery, interface and LED functions for
single cell handheld products
−
Supports single core only
i.MX
6Quad
eReader
i.MX
6Solo
i.MX
6SoloLite
PFUZE101
TBD
Tablet/
Smartbook –
1-cell Li-ion
PFUZE101
Tablet/
Smartbook Multi-cell Liion
PFUZE102
Embedded
PFUZE100
Auto
Infotainment
PFUZE100
TM
i.MX
6Dual
TBD
i.MX 6 Processor Power Needs
i.MX 6D
ARM
GPU/SOC
i.MX6 DL
i.MX 6S
i.MX 6SL
Voltage
(V)
Current
(mA)
Voltage
(V)
Current
(mA)
Voltage
(V)
Current
(mA)
1.36
1100
1.36
1000
1.36
700
Voltage
(V)
Current
(mA)
0.9 to 1.2
1750
1.33
1700
1.33
900
1.33
900
Analog/i.MX
2.7 to 3.3
400
2.7 to 3.3
400
2.7 to 3.3
400
1.8 to 3.3
300
IO/ i.MX
1.8 to 3.3
300
1.8 to 3.3
150
1.8 to 3.3
125
1.8
125
MEM IF
1.5
500
1.5
500
1.5
400
1.5
200
5
70
5
70
5
70
5
70
USB
TM
Opciones de Encapsulado
TM
Encapsulado TFBGA de 21mm Discrete
• 21 by 21 FC TFBGA, 2.0mm zheight
• 0.8mm ball pitch
Description
• Green BOM,
• 624 ball
Package
Characteristics
Requirements
–
•
•
•
•
1 center ball depopulated for orientation
.480 Mold Cap
.66 Substrate Thickness
1.6 package thickness (minus balls)
.38 NOM ball height
• Coplanarity <= 100um
• Warpage <= 70um
Notes:
1. Note that the array is depopulated and has core PWR/GND
balls located to minimize board routing complexity and cost,
2. Substrate thickness of 300um is worst case, but we want to
evaluate warpage performance of all options before
committing to thinner materials,
TM
12 by 12 PoP at .4
607 + 25
Niveles de Calidad – Encapsulado FCBGA 21x21
•
•
•
Lidded
−
Contains a metal lid covering the processor
−
More robust for industrial or automotive environments
Lidded
Non Lidded
Non-Lidded
−
Exposes the back side of the die (flipchip)
−
Lower Z-height for space constrained devices
−
Easier to attach custom heat spreaders
Three types of Qual for i.MX 6Series
−
Consumer Highest Frequency
−
Automotive Maximum environmental support
−
Industrial Longest duration (“always on”)
Type
Characteristics
Consumer
•
•
•
•
-20 to 105Deg Tj
5 year life cycle @ 50% duty cycle
Max of 1.2Ghz CPU speed
Non Lidded
Automotive
•
•
•
•
-40 to 125Deg Tj
Max of 1Ghz CPU speed
Lidded
Industrial
•
•
•
•
-40 to 105Deg Tj
Max of 800Mhz CPU speed
Lidded
TM
FC-BGA Manufacturing
App note (Lid and non-Lid)
21x21 FCBGA - Estructura Mechanical
12 by 12 P
607 + 25
Full dimensions available in the i.MX 6 Consumer and Automotive
Datasheets on the i.MX 6Quad/6Dual Extranet
TM
¡Muchas gracias!
TM

i.MX 6 - Electrocomponentes

Transcripción

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